1. Field of the invention
The present invention relates to clock pattern writers for magnetic disk drive memories.
2. Description of Related Art
Magnetic disk drive memories are well-known devices for storing large quantities of digital data. An example of a typical disk drive is indicated generally at 10 in FIG. 1. As the name suggests, a disk drive has one or more disks 12 coated with a magnetizable medium such as ferrous oxide on which the data may be magnetically stored. The disks, often referred to as platters, may be vertically stacked and caused to rotate about a central spindle 14. Data may be stored or "written" onto each surface of the media platters by read-write data heads 16 which are placed in close physical proximity to the surface of a platter. By passing a current through a read-write head, a small portion of the surface of the associated platter may be magnetized to form a magnetic domain and store a digital 1 or 0 onto the platter.
Typically, the read-write heads 16 are rigidly coupled to each other in a vertical stack, and may be moved together as an assembly 20 in a radial motion by a positioning mechanism 22 either towards or away from the spindle 14 of the platter stack. At each position of a head of the head stack, a unique circular track is defined in the surface of the associated platter as the platter rotates below the head. To read data written on the circular data tracks, currents induced in the read-write data heads by the magnetic domains on the media platter are sensed and amplified for transmission to other parts the computer system.
Many disk drive designs require a special "clock pattern" be written around a track of one or more surfaces of the platters. The track on which the clock pattern is written is referred to as the clock track. The clock pattern as it is read from the clock track provides timing information for a variety of purposes. For example, the clock pattern may be used to generate special timing signals for synchronizing the data read operation. These timing signals include "write clock" and "sector mark" signals. In addition, the clock pattern may be used to generate "servo tracks" which are used to position the read-write heads of the disk drive over the data tracks. Timing information may be encoded into the servo tracks so that the write clock and sector mark signals may be generated from the servo tracks as well. Consequently, in some disk drive designs, the clock track is discarded after the servo tracks are written.
For proper operation, it is very important that the clock pattern have exactly a predetermined number of pulses around the clock track. This requirement is referred to as "count closure" and the predetermined number of pulses is referred to as the "clock track pulse count." As the density of data stored on disk drives has increased, the magnitude of the clock track pulse count has correspondingly increased. For some disk drive designs, the clock track pulse count exceeds 100,000, which makes it more difficult to exactly match the required clock track pulse count when writing the clock pattern onto the clock track.
In addition, the presence of phase transients, that is, the presence of uneven spacing between the pulses of the clock track must be reduced as much as possible. Furthermore, phase transients at the point of the clock track where the end of the clock pattern being written is joined to the beginning of the clock pattern must be particularly avoided. This requirement is referred to a "phase closure." Many disk drive designs allow a maximum of 10 to 30 nanoseconds phase transient in the clock pattern.
Previously, many disk drives used marks which were physically inscribed on the surface of the platter to generate the necessary clock signals. Other designs utilized optical or electromagnetic transducers affixed to the spindle of the drive. U.S. Pat. No. 4,155,105 to Braun describes a transducer-based clock system. However, these electro-mechanical designs are not well suited to high data density disk drives which generally require very high frequency clock signals. Similarly, these prior designs do not readily allow the writing of temporary clock patterns and are not easily adapted to smaller disk drives having platters eight inches or smaller.
To overcome these difficulties, various electronic clock generating systems have been developed. One prior system uses a technique referred to as the "speed head method" which measures the rotational speed of the platters. Referring now to FIG. 2, a master speed head 30 and a slave speed head 32 are positioned over the same data track at a closely controlled angular spacing. An index pulse (or series of pulses) generated by a generator 38 is written by the master speed head 30. The time difference between the detection of the pulse at the two heads 30 and 32 is then measured. In this manner, a precise measurement of the rotational speed of the platter is obtained. This information is supplied to a phase-locked loop 34 which is used to generate a clock signal pattern which is written on the disk by a third head, the clock head 36. Alternatively, the speed head signal may be supplied as a feedback signal to the spindle motor speed regulator of the disk drive.
After the clock track has been written, verifier circuitry 40 checks the clock track for proper count and phase closure. If the count and phase closures are not within the specified ranges, the clock track must be erased and rewritten until a correct clock track has been achieved. A second phase-locked loop 42 may then be locked onto the clock signal from the clock track to write the servo patterns or sector marks. U.S. Pat. No. 4,371,902 to Baxter et al. describes speed head techniques.
Referring now to FIG. 3, a direct closure process usually begins with the writing of a single index pulse using an index head 44. The output of a voltage-controlled oscillator 46 is divided in frequency by a count n equal to the track pulse count, and the resultant output signal of the n divider is locked onto the index signal from the index head 44 by a phase-locked loop 48.
The output of the oscillator 46 is provided to a temporary clock head 50 to write a temporary clock track. Verifier circuitry 52 checks for count closure. If the temporary clock track does not have the correct track pulse count, it must be rewritten over and over using the above process until the correct count is achieved.
Once the temporary clock track has been successfully written, the output signal of another phase-locked loop 54 is locked onto the temporary clock pattern signal to generate the final clock track which is written by the clock head 56. The filter bandpass of the second phase-locked loop 54 is normally higher than that of the first loop 48 to enable to the second loop 54 to better track any disk speed variations. However, the bandpass is also calculated so as to suppress any phase transients which may have occurred at the write splice on the temporary clock track.
It is noted that in theory, the final clock track might be written directly from the first phase locked loop 48, without the use of an intermediate clock track. However, an extremely great number of attempts may be required to achieve both count and phase closure. Moreover, an additional phase-locked loop will usually be required for user applications of the final clock track. A direct closure clock writing system is described in U.S. Pat. No. 3,540,022.
Intermediate frequency clock closure systems (FIG. 4.) are similar to direct closure systems, except that the temporary clock track is typically written at a frequency much lower than the final clock frequency--usually an integral submultiple of the final clock frequency. Thus, a divide by k circuit of the low frequency phase-locked loop 60 divides by a count k&lt;n of the divide by n circuit of FIG. 3. As a consequence, count closure is much more readily achieved in the temporary clock track.
In addition, a frequency divider circuit 62 is also employed in the intermediate frequency phase-locked loop 64 which controls the writing of the final clock track. The second frequency divider circuit 62 allows the desired clock track pulse count to be achieved. A third phase-locked loop 66 is typically provided for user applications of the final clock track. It is noted that more than one intermediate frequency stage may be employed. U.S. Pat. No. 4,131,920 describes a type of intermediate frequency closure systems in which an intermediate frequency clock track is written having a track count which is not integrally related to the final clock track count.
It should be noted that there are a number of variations of the above systems. For example, the verify operation may be performed during the writing operation rather than in a subsequent read operation. Also, direct closure and intermediate frequency closure systems may be implemented without a dedicated index head. For example, a temporary index may be written on the track opposite from the temporary or final clock track, used for verify and phase-locking operations, and then discarded.
These previous electronic closure systems have a number of disadvantages. The update rate of the phase-locked loop for the first clock write operation is usually equal to the rotation period of the drive (or to a small integral multiple of it, in the case of certain speed head method variants). The time constant of the phase-locked loop is often much longer than the update rate, and therefore may be many orders of magnitude larger than the period of the final clock track signal. As a result, the phase-locked loop may require many revolutions of the disk to achieve lock. Moreover, once lock has been achieved, it may be unable to follow closely any instantaneous speed variations of the disk or frequency drift of the voltage-controlled oscillator. Consequently, many attempts may be required before achieving closure--particularly when using direct closure to write a high-density clock track on a disk drive with a relatively poor spindle speed regulation.
The speed head closure method suffers from a stringent requirement for accuracy in the relative angular and radial placement of the speed heads. Also, the speed head method usually requires three heads instead two.
The direct closure and intermediate frequency closure systems usually require a multiplicity of phase-locked loops, each often having a unique passband characteristic, for best performance. Direct closure systems normally require two phase-locked loops; intermediate frequency systems may require three or even four phase-locked loops. In general phase-locked loops use significant numbers of discrete analog components which are not readily compatible with large scale integrated circuits. Moreover, the intermediate frequency method is not readily suited for applications requiring a programmable track pulse count and frequency.